Descripción
| Información General | |
| Type | CPU / Microprocessor |
| Market segment | Mobile |
| Family | AMD Turion II Dual-Core Mobile |
| Model number ? | M500 |
| CPU part number |
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| Stepping codes | CAEEC AE CAEFC AE NAEIC AE |
| Frequency ? | 2200 MHz |
| Bus speed ? | One 1800 MHz 16-bit HyperTransport link (3.6 GT/s) |
| Clock multiplier ? | 11 |
| Package | 638-pin lidless organic micro Pin Grid Array (UOL638) |
| AMD Package number | 30405 |
| Socket | Socket S1 (S1g3) |
| Size | 1.38″ x 1.38″ / 3.5cm x 3.5cm |
| Weight | 0.2oz / 6.5g (by specifications) |
| Introduction date | Sep 10, 2009 |
| End-of-Life date | Last order date is end of 1st quarter 2011 |
| Architecture / Microarchitecture | |
| Microarchitecture | K10 |
| Platform | Tigris |
| Processor core ? | Caspian |
| Core stepping ? | DA-C2 |
| CPUID | 100F62 |
| Manufacturing process | 0.045 micron silicon-on-insulator (SOI) technology |
| Data width | 64 bit |
| The number of CPU cores | 2 |
| The number of threads | 2 |
| Floating Point Unit | Integrated, 128-bit wide |
| Level 1 cache size ? | 2 x 64 KB 2-way set associative instruction caches 2 x 64 KB 2-way set associative data caches |
| Level 2 cache size ? | 2 x 512 KB 16-way set associative caches |
| Level 3 cache size | None |
| Multiprocessing | Uniprocessor |
| Extensions and Technologies | |
| Security Features |
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| Low power features |
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| Integrated peripherals / components | |
| Integrated graphics | None |
| Memory controller | The number of controllers: 1 Memory channels: 2 Channel width (bits): 64 Supported memory: DDR2-800 Maximum memory bandwidth (GB/s): 12.8 |
| Other peripherals |
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| Electrical / Thermal parameters | |
| Thermal Design Power ? | 35 Watt |






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